Nội dung text ATPG labs part 2 (Case8, 9, 6).pdf
ATPG LABS PART 2 +91-9986194191 | www.vlsiguru.com | www.inskill.in
+91-9986194191 | www.vlsiguru.com | www.inskill.in CASE 8 AU.SEQ Unclassified Designer has kept some nets unconnected or undriven Fix : inform it to the designer.
+91-9986194191 | www.vlsiguru.com | www.inskill.in CASE9 There are memories in the design. As we have black boxed the memories, the output if memories will be x. x is propagated to the downstream logic. So there will be coverage drop.
+91-9986194191 | www.vlsiguru.com | www.inskill.in CASE 9 (Contd...) Bypass the memories to stop the propagation of x to the downstream logic. In .tcd_mem_lib file, Transparent Mode : SyncMux Tool will add the memory bypass logic. (Otherwise)