PDF Google Drive Downloader v1.1


Report a problem

Content text ELX112 Microprocessor and Computer Archietcture.pdf


2.3.5 Machine control instruction 2.4 Operation Code and Operands, 2.5 Addressing Modes, 2.6 Interrupts and Flags 2.7 Instructions Types and Data Flow inside 8085, 2.8 Timing Diagram (two examples of 4, 7, 10 and 13 T-states) 2.8 Basic Assembly Language Programming Using 8085 Instruction Sets  Familiarize with the architecture of 16 bit microprocessor 8086.  concept of memory segmentation and pipelining in modern processor. UNIT 3 Overview of 8086 microprocessor [5 Hrs] 3.1 Features of 8086 microprocessor 3.2 Functional diagram of 8086 microprocessor 3.3 Registers and Flags 3.4 ALP Development Tools: Editor, Assembler and linker  Familiarize with CPU Fundamental UNIT 4 CPU Fundamental [4 Hrs] 4.1 CPU organization/Structure 4.2 Register organization and data path 4.3 Arithmetic and Logic units 4.4 Design principal for modern system  Examine the basic structure of a micro- sequencer and Hardwired Control Unit UNIT 5 Control Unit Design [6 Hrs] 5.1 Control of the processor 5.2 Hardwired Control Unit(Control unit inputs and logic) 5.3 Microprogramed control units(Micro instruction and its types) 5.4 Architecture of micro programmed control unit 5.5 Microinstruction sequencing and execution 5.6 Application of hardwired and micro programmed control units  Understand the representation of binary numbers in signed and unsigned notation along with the algorithms used for the basic arithmetic operations. UNIT 6 Computer Arithmetic [6 Hrs] 6.1 Numeric format and representation of binary number in signed and unsigned notation 6.2 Addition and subtraction in signed and unsigned notation. 6.3 Shift and add multiplication algorithm, Booth’s algorithm. (signed and unsigned)  Review memory Hierarchy of computer system and study the concept of associative and cache memory in real world scenario. UNIT 7 Memory Organization [4 Hrs] 7.1 Memory hierarchy 7.2 Memory interfacing diagram (RAM and ROM with 8085) 7.3 Associative memory 7.4 Cache Memory and mapping techniques  Familiarize with serial and parallel communication interfaces and introduce various methods for improving I/O performances. UNIT 8 Input/Output Organization [4 Hrs] 8.1 Serial and parallel communication interfaces 8.2 Programmed I/O 8.3 Interrupts, types of interrupts, Interrupt processing, Interrupt Hardware and priority 8.4 Direct Memory Access, I/O Processors  Understand with the concept of instruction pipelining and multicore architecture in modern processor. UNIT 9 Advance Architectures [4 Hrs] 9.1 RISC and CISC Fundamentals 9.2 Instruction Pipeline, Register window 9.3 Flynn’s Taxonomy, MIMD system topologies and architectures 9.4 Introduction to multicore architecture

presentation with the submission of report should be a part of work and must be included as a component for evaluation. 7. Evaluation system and Students’ Responsibilities Internal Evaluation Weight Marks External Evaluation Marks Theory 30 Semester End examination 50 Attendance & Class Participation 10% Assignments 20% Presentations/Quizzes 10% Internal Assessment 60% Practical 20 Attendance & Class Participation 10% Lab Report/Project Report 20% Practical Exam/Project Work 40% Viva 30% Total Internal Marks 50 Full marks=50+50 Students Responsibility: Each student must secure at least 45% marks separately in internal assessment and practical evaluation with 80% attendance in the class in order to appear in the semester End Examination. Failing to get such score will be given NOT QUALIFIED (NQ) to appear the Semester End Examination. Students are advised to attend all the classes, formal exam, and test and complete all the assignments within the specified time period. Students are required to complete all the requirements defined for the completion of the course. 8. Prescribed Text Books and references Text Books: 1. Gaonkar, Ramesh S., Microprocessor Architecture, Programming, and Applications with 8085, Prentice Hall. New Delhi 2. Stallings, W., “Computer Organization and Architecture”, Eighth Edition, 2011, Pearson. References: 1. Hall, Douglas V. Microprocessor and Interfacing programming and Hardware, McGraw Hill, New Delhi 2. Carpineili, John D., Computer system Organization and Architecture, Addison Wesley. Pearson Education Asia (LPE),2001 3. Malvino: Digital Computer Electronics and Introduction to Microcomputers 4. Dougals V. Hall: Microprocessor and Interfacing programming and Hardware, McGraw Hill. 5. Mano, M.M., “Computer Systems Architecture”, Third Edition, 2011, Pearson. 6. Tanenbaum, A.S., “Structured Computer Organization”, Fourth Edition, 2003, Pearson Education. 7. Rajaraman, V. et all, “Computer Organization and Architecture”, 2011, PHI. 8. Sima, D. et all, “Advanced Computer Architecture”, 2000, Addison Wesley.

Related document

x
Report download errors
Report content



Download file quality is faulty:
Full name:
Email:
Comment
If you encounter an error, problem, .. or have any questions during the download process, please leave a comment below. Thank you.