Title EE5215 Industrial Electronics-2021_S1.pdf ✅

Page 1 of 4 University of Moratuwa Faculty of Engineering Department of Electrical Engineering MSc/PG Diploma in Industrial Automation Semester 1 Examination 2021 EE5215 Industrial Electronics Time allowed: Two Hours ONLY August 2021 INSTRUCTION TO CANDIDATES: This paper contains 2 questions in PART (A) and 1 question in PART (B) on 4 pages. Answer all questions in PART (A) and PART (B) separately. This paper accounts for 80% of the module assessment. The total maximum mark attainable is 80. The marks assigned for each question and sections thereof are indicated in square brackets. Only lecture materials are allowed. Assume reasonable values for any data not given in or with the examination paper. Clearly state such assumptions made on the script. If you have any doubt as to the interpretation of wording of question, make your own decision, but clearly state it in the script. All Examinations are conducted under the rules and regulations of the University.
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Page 4 of 4 d). Calculate maximum possible steady state duty cycle for the converter. State any assumption made. [5 marks] e). Calculate the maximum number of turns in the secondary winding of the isolation transformer. [3 marks] f). Stating any formula used, calculate peak blocking voltage of the switch and the diode during the operation. [6 marks] PART B Question 1B a). A full adder (FA) can be implemented in many ways. Design a FA from two half adders. Construct a function table for this arrangement and verify its operation. b). Design a binary counter that counts from 0 to 1023. c). Design a MOD 3 rising edge asynchronous counter. d). A manufacturing plant needs to have a horn sound to signal quitting time. Assuming you are the design Engineer, prepare a list of necessary conditions and design a logic circuit that will control the horn as per the client requirements. e). A D flip-flop is sometimes used to delay a binary waveform so that the binary information appears at the output a certain amount of time after it appears at the D input. Design circuit to justify the above statement. [5*6 marks=30 marks]