Title Sử dụng cho tính toán.pdf ✅

TABLE 4.1 BJT Bias Configurations Type Configuration Pertinent Equations Fixed-bias IB = VCC - VBE RB IC = bIB, IE = (b + 1)IB VCE = VCC - IC RC Emitter-bias IB = VCC - VBE RB + (b + 1)RE IC = bIB, IE = (b + 1)IB Ri = (b + 1)RE VCE = VCC - IC (RC + RE) Voltage-divider bias EXACT: RTh = R1 ||R2 , ETh = R2VCC R1 + R2 IB = ETh - VBE RTh + (b + 1)RE IC = bIB, IE = (b + 1)IB VCE = VCC - IC (RC + RE) APPROXIMATE: bRE Ú 10R2 VB = R2VCC R1 + R2 , VE = VB - VBE IE = VE RE , IB = IE b + 1 VCE = VCC - IC(RC + RE) Collector-feedback IB = VCC - VBE RF + b(RC + RE) IC = bIB, IE = (b + 1)IB VCE = VCC - IC (RC + RE) Emitter-follower IB = VEE - VBE RB + (b + 1)RE IC = bIB, IE = (b + 1)IB VCE = VEE - IE RE Common-base IE = VEE - VBE RE IB = IE b + 1 , IC = bIB VCE = VEE + VCC - IE(RC + RE) VCB = VCC - ICRC VCC RC RB VCC RC RE RB RC R1 RE R2 VCC RC RF RE VCC RB RE –VEE RE VEE RC VCC –+ + – 193
RC RF VCC Vi Zo + – Io Vo+ – I i Zo RE RB VCC Io Vo+ – Zi Ii Vi + – Zo RB RC RE VCC I i Io Vo+ – Vi + – Zi Zo R2 R1 RC RE VCC CE Zi I i Io Vo+ – Vi + – Zo TABLE 5.1 Unloaded BJT Transistor Amplifiers Configuration Z i Z o A v Ai Fixed-bias: Medium (1 k) = RB 7 bre bre (RB Ú 10bre ) Medium (2 k) = RC 7ro RC (ro Ú 10RC) High (-200) = - (RC 7 ro ) re -RC re (ro Ú 10RC) High (100) = bRBro (ro + RC)(RB + bre ) b (ro Ú 10RC, RB Ú 10bre ) Voltage-divider bias: Medium (1 k) = R1 7 R2 7 bre Medium (2 k) = RC 7ro RC (ro Ú 10RC) High (-200) = -RC 7 ro re -RC re (ro Ú 10RC) High (50) = b(R1 7 R2 )ro (ro + RC)(R1 7 R2 + bre ) b(R1 7 R2 ) R1 7 R2 + bre (ro Ú 10RC) Unbypassed emitter bias: High (100 k) = RB 7 Zb Zb b(re + RE) RB 7bRE (RE W re ) Medium (2 k) = RC (any level of ro ) Low (-5) = - RC re + RE -RC RE (RE W re ) High (50) - bRB RB + Zb Emitter- follower: High (100 k) = RB 7 Zb Zb b(re + RE) RB 7bRE (RE W re ) Low (20 ) = RE 7re re (RE W re ) Low (1) = RE RE + re 1 High (-50) - bRB RB + Zb Common-base: Low (20 ) = RE 7re re (RE W re ) Medium (2 k) = RC High (200) RC re Low (-1) -1 Collector feedback: Medium (1 k) = re 1 b + RC RF (ro Ú 10RC) Medium (2 k) RC 7 RF (ro Ú 10RC) High (-200) -RC re (ro Ú 10RC) (RF W RC) High (50) = bRF RF + bRC RF RC RB RC VCC Vi Zi Vo+ + – – Ii Io Zo RE RC VEE VCC Io Vo+ – Zi Vi + – Ii Zo 293
TABLE 6.3 Field Effect Transistors Type Symbol and Basic Relationships Transfer Curve Input Resistance and Capacitance JFET ( n -channel) Ri 7 100 M Ci : (1 - 10) pF MOSFET depletion type ( n -channel) Ri 7 1010 Ci : (1 - 10) pF MOSFET enhancement type ( n -channel) Ri 7 1010 Ci : (1 - 10) pF MESFET depletion type ( n -channel) Ri 7 1012 Ci : (1 - 5) pF MESFET enhancement type ( n -channel) Ri 7 1012 Ci : (1 - 5) pF
450 TABLE 7.1 FET Bias Configurations Type Configuration Pertinent Equations Graphical Solution JFET Fixed-bias VGSQ = -VGG VDS = VDD - IDRS JFET Self-bias VGS = -IDRS VDS = VDD - ID(RD + RS ) JFET Voltage-divider bias VG = R2VDD R1 + R2 VGS = VG - IDRS VDS = VDD - ID(RD + RS ) JFET Common-gate VGS = VSS - IDRS VDS = VDD + VSS - ID(RD + RS ) JFET (RD = 0 ) VGS = -IDRS VD = VDD VS = IDRS VDS = VDD - ISRS JFET Special case (VGSQ = 0 V) VGSQ = 0 V IDQ = IDSS Depletion-type MOSFET Fixed-bias (and MESFETs) VGSQ = +VGG VDS = VDD - IDRS Depletion-type MOSFET Voltage-divider bias (and MESFETs) VG = R2VDD R1 + R2 VGS = VG - ISRS VDS = VDD - ID(RD + RS ) Enhancement type MOSFET Feedback configuration (and MESFETs) VGS = VDS VGS = VDD - IDRD Enhancement type MOSFET Voltage-divider bias (and MESFETs) VG = R2VDD R1 + R2 VGS = VG - IDRS –+ RD RG VGG VDD RD RG RS VDD RD R2 RS R1 VDD RD RS –VSS VDD RD VDD RD RG VGG VDD RG RS VDD RD R2 RS R1 VDD RG RD VDD RD RS R1 R2 VDD Q-point VGS ID VP VGG 0 IDSS I'D Q-point VP V' VGS GS 0 ID IDSS Q-point VP VGS 0 ID IDSS VG VG RS Q-point VP VGS 0 ID IDSSVSS VSS RS Q-point VP VGS 0 ID IDSS V'GS I'D VGSQ = 0 V Q-point VP VGS 0 ID IDSS Q-point VP VGS 0 ID IDSS VGG Q-point VP VGS 0 ID IDSS VG VG RS Q-point VGS(Th) VGS 0 ID VGS(on) VDD RD ID(on) VDD VG RS Q-point VGS(Th) VGS 0 ID VG