Title 3140707 - COA 2020W.pdf ✅

1 Seat No.: ________ Enrolment No.___________ GUJARAT TECHNOLOGICAL UNIVERSITY BE- SEMESTER–IV (NEW) EXAMINATION – WINTER 2020 Subject Code:3140707 Date:15/02/2021 Subject Name:Computer Organization & Architecture Time:02:30 PM TO 04:30 PM Total Marks:56 Instructions: 1. Attempt any FOUR questions out of EIGHT questions. 2. Make suitable assumptions wherever necessary. 3. Figures to the right indicate full marks. MARKS Q.1 (a) What is PSW? Explain each bit of it 03 (b) Write ALP for addition of 10 numbers 04 (c) List and explain Memory reference instructions in detail 07 Q.2 (a) Design a digital circuit for 4-bit binary adder 03 (b) Explain 4 bit arithmetic circuit with suitable diagram. 04 (c) Draw and briefly explain flowchart for second pass of assembler. 07 Q.3 (a) Explain any three register reference instruction in detail. 03 (b) Explain BCD adder in brief 04 (c) Draw and explain micro program sequencer circuit with diagram. 07 Q.4 (a) State the differences between hardwired control and micro programmed control. 03 (b) Explain hardware implementation of common bus system using three- State buffers. Mention assumptions if required. 04 (c) Explain delay load and delay branch with respect to RISC pipeline. 07 Q.5 (a) Draw and briefly explain flowchart for first pass of assembler 03 (b) State the major characteristics of RISC processor 04 (c) Elaborate 4-segment instruction pipeline with neat sketches. 07 Q.6 (a) State the major characteristics of CISC processor 03 (b) List various types of addressing modes and explain any four of them. 04 (c) What is virtual memory? Explain relation between address space and memory space in virtual memory system. 07 Q.7 (a) Briefly explain source initiated transfer using handshaking. 03 (b) Differentiate Programmed I/O and Interrupt initiated I/O 04 (c) Write a short note on associative memory. 07 Q.8 (a) How main memory is useful in computer system? Explain the memory address map of RAM and ROM. 03 (b) Explain daisy chain priority interrupt 04 (c) Explain CPU-IOP communication with diagram. 07 *************