Title Oct 29 (ATPG Part 1).pdf ✅

AUTOMATIC TEST PATTERN GENERATION Part 1 (Oct 29) +91-9986194191 | www.vlsiguru.com | www.inskill.in
+91-9986194191 | www.vlsiguru.com | www.inskill.in ATPG • It is a process of generating test patterns for a given fault model (SA, TDF, PDF, IDDQ etc) • During ATPG, our tool tries to check if a particular defect occurs after manufacturing, will it get detected or not. HOW DOES OUR TOOL KNOW BEFORE MANUFACTURING ITSELF WHETHER A PARTICULAR MANUFACTURING DEFECT WILL GET DETECTED OR NOT ?
+91-9986194191 | www.vlsiguru.com | www.inskill.in FAULT SIMULATION: • During ATPG, the design (EDT inserted netlist) is provided to the ATPG tool. The ATPG tool keeps this design (good machine) and creates another design by inducing all possible faults into it (faulty machine). • The tool generates patterns for good machine (applies all possible combinations of inputs) and keeps that as expected response (good value). • Then the tool applies patterns for faulty machine and tries to see whether the pattern detects the fault. • If good value is not the same as faulty value the fault is detected and vice versa. • Based on the result of fault simulation, the tool categorizes the faults into various classes. The optimized set of patterns which are obtained during ATPG will be given to the tester for testing the chip after manufacturing. (Not detected)
+91-9986194191 | www.vlsiguru.com | www.inskill.in NOTE • During faulty machine simulation, the tool first applies random patterns to detect the faults. Whichever faults gets detected, the tool considers as detected faults (Random Pattern Generation). • After applying random patterns, whichever faults are not detected, the tool will apply algorithms (example: D algorithm) to detect those faults (Deterministic Pattern Generation) • Deterministic Pattern Generation is only used for those faults which are not detected in Random Pattern Generation.