Content text microprocessor 2nd sem important question.pdf
@Imagine IT Nepal → https://www.youtube.com/imagineitnepal Tribhuvan University Faculty of Humanities and Social Science Bachelor’s in computer applications Course Title: Microprocessor and Computer Architecture Code No: CACS155 Semester: II Unit 1: Fundamental of Microprocessor 1. Explain the bus organization of 8085 microprocessor. [5] [2018] 2. Explain the opcode fetch machine cycle for MVI A, 32H with timing diagram. [5] [2018] 3. Define CPU. Differentiate between microprocessor and microcontroller with example. [1+4] [2019] 4. Define instruction cycle. Explain the opcode fetch machine cycle of MOV A, B with timing diagram. (Opcode MOV A, B=78h) [5] [2019] 5. Write short notes on. [2.5] [2019] a) 8085 Interrupts 6. Draw the timing diagram for MVI A, 35H and explain in brief. [5] [2020] 7. Define the term mnemonics, instruction cycle and machine cycle. [3] [2020] 8. Draw the timing diagram for MOV B. [4] [2021 batch] 9. Draw the timing diagram of LXI H, 5070H instruction. [5] [2021] Unit 2: Introduction To Assembly Language Programming 1. Explain 8085 instruction addressing mode with example [5] [2018] 2. Explain the functional block of 8085 microprocessor [10] [2018] 3. Define ALP using 8085 to check number stored in memory location 8080h is either even or odd. [5] [2019] 4. Define instruction set. Classify the instruction available in 8085 with example [2+8] [2019] 5. Define the addressing mode. Explain the various instruction addressing mode with example. [2+8] [2019] 6. Explain the addressing modes of 8085 with suitable example. [5] [2020] 7. Explain the following instruction. [5 +5] [2020,2021 batch]
@Imagine IT Nepal → https://www.youtube.com/imagineitnepal a) LDA 7050H b) CPI 35H c) PUSH B d) LHLD 5050H e) CPI 34H f) JNZ 6080H 8. There are two tables holding twenty data whose starting address is 3000H and 3020H respectively. Write a program to add the content of first table with the content of second table having same array index. Store sum and carry into the third and fourth table indexing from 3040H and 3060H respectively. [7] [2020] 9. For the expression Y = (A + B) * (C + D) Write down the code for one address, two address and three address instruction formats. [10] [2020] 10. Define addressing mode? Suppose counter of register A and B is 37H and 57H respectively. Find the content of flag register after ADD B is performed. [2+3] [2021 batch] 11. For ten byte of data starting from 7050H, Write a program to sort the reading in ascending order. [7] [2021 batch] 12. What is the use of flag? Explain different flags of 8085 with an example. [1+4] [2021] 13. Short notes Addressing modes of 8085 [2.5] [2021] 14. You have a list of data stored at memory location starting at 8050H. The end of the data array is indicated by data byte 00H. Write a program to add the set of readings. Store the sum at 9050 and total carry at 9051H [8] [2021] 15. Write a program to evaluate the arithmetic statement: X= A-B+C*(D*E+F)/G+H*K a) Using a general register computer with two address instruction [3] b) Using an accumulator type computer with one address instruction [3] c) Using stack organized computer with zero-address operation instruction [4] Unit 3: Basic Computer Architecture 1. Explain the memory hierarchy with diagram [5] [2018]
@Imagine IT Nepal → https://www.youtube.com/imagineitnepal 2. What is cache memory. Explain the elements of cache design. [5] [2019] 3. Write short notes on. [2.5] [2019] a) Structure of hard disk 4. What is the requirement of common bus system? Explain with figure [5] [2021 batch] Unit 4: Microprogrammed Control 1. Explain the organization of Microprogrammed Control Unit. [5] [2018] 2. Explain the design and control logic of Accumulator. [10] [2018] 3. Explain the organization of microprogrammed control unit. [5] [2019] 4. Write short notes on. [2.5] [2019] a) Accumulator 5. Define micro program? Describe symbolic microprogram for instruction FETCH routine. [2+8] [2019] 6. Explain the organization of microprogram sequencer for control memory with suitable diagram. [10] [2019] 7. Explain Symbolic Microinstruction and microinstruction format. [5] [2021 batch] 8. Explain the basic working principle of the control unit with timing diagram. [5] [2021 batch] 9. Explain the step of Address Sequencing in details. Draw and explain selection of address for control memory. [5+5] [2021 batch] 10. Explain how does control unit determines the type of instruction after it is read from memory. [5] [2021] 11. What is microprogram sequencer? Differentiate between hardwired control unit and microprogrammed control unit. [2+3] [2021] 12. Define symbolic microprogram. [2] [2021] 13. Explain in detail about the structure of control unit and its basic requirement. [8] [2021] Unit 5: Central Processing Unit 1. Define control word. Explain the procedure for generating control word for specific operation. [5] [2018] 2. Explain the different data transfer and manipulation instruction with example [10] [2018] 3. What do you mean by instruction mapping? Explain how to convert an instruction code to a microinstruction address. [2+3] [2020]
@Imagine IT Nepal → https://www.youtube.com/imagineitnepal 4. Define stack. Explain the stack organization [1+4] [2020] 5. What are the typical characteristics of CISC instruction set architecture? Explain [5] [2020] 6. What is Stack? Give the organization of register stack with all necessary elements. [1+4] [2021 batch] 7. What are the basic differences between a branch instruction, a call subroutine instruction, and program interrupt? [5] [2021] 8. Define word count. [2] [2021] Unit 6: Pipeline, Vector Processing and Multiprocessors 1. Define instruction pipeline. Explain the four-segment instruction pipeline with example. [5] [2018] 2. What is pipeline? Explain four segments instruction pipeline. [5] [2019] 3. Explain the arithmetic pipeline with example [5] [2020] 4. What is parallel processing? Explain the benefit of parallel processing. Explain the classifications of parallel processing by M.J Flynn. [2+2+6] [2020] 5. What is pipeline conflict? Explain data dependency and handling of branch instruction in details. [1+4] [2021 batch] 6. Discuss four-segment instruction pipeline with suitable diagram. [10] [2021 batch] 7. What do you mean by pipelining hazards? Explain briefly. [5] [2021] 8. Short notes Vector processing [2.5] [2021]